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Redline and Intel Highlight Proposed STAC-T1 “Tick to Trade” Benchmark

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Redline Trading Solutions and Intel are highlighting performance benchmarks for the latest versions of Redline’s ticker plant and execution gateway software, conducted using the proposed STAC-T1 test harness designed to measure “Tick to Trade” latency.

STAC-T1 – as administered along with other benchmarks by the Securities Technology Analysis Center – measures the latency of a trading platform from the time it receives a price update from a market data feed, to the time it transmits an order to the market, driven by that price update. As such, it determines the end-to-end latency of the software and hardware components (Stack Under Test, in STAC language) that support trading application logic.

STAC developed STAC-T1 in collaboration with the Chicago Mercantile Exchange and with an unnamed proprietary trading firm that trades on the exchange. Hence, the first variant, STAC-T1.EMINI, is based on trading CME E-mini futures. STAC is now looking to turn its work to date into an official benchmark offering, a process that requires input from and endorsement by the STAC Benchmark Council, a group of trading firms and technology vendors.

For its part, Redline was keen to be an early test case for the new benchmark because it covered both its latest Inrush 3 ticker plant and its execution gateway components. Moreover, Intel was an interested party, since InRush 3 is the first version of the ticker plant to run entirely on Intel microprocessors – early versions leveraged Cell chips from IBM.

Redline vice president of technical marketing Lee Fisher says that as Intel’s chip offerings have become increasingly multi-core, so the benefits of the parallel Cell architecture – which IBM has not developed in recent years – were overtaken by the mainstream chips. Fisher says that in a typical server, InRush and the execution gateway run on just a few processor cores, allowing the actual trading application to run on others – with very low latency shared memory communication between all of the software components.

For the STAC-T1 benchmark tests, the Redline suite was run on two configurations of HP ProLiant servers, one with Intel’s Xeon X5670 “Westmere” chips, and another with the latest Xeon E5-2690 “Sandy Bridge” offering. In both cases, Mellanox ConnectX-3 10gE network adaptors were used – Fisher says Redline has taken great effort to leverage functionality, such as kernel bypass, that such adaptors provide.

The FAST protocol was used to deliver recorded CME market data, and FIX order messages were generated. Latency monitoring was accomplished using Corvil’s CorvilNet appliance, and a Datacom Systems optical network tap (which added just five nanoseconds of latency).

For the Sandy Bridge configuration, top line latency figures – at the same data rate as recorded in the live market – showed mean latency of 6.1 microseconds, a maximum latency of 18.2 microseconds, and jitter of 1.4 microseconds.  For more information on this benchmark, click here.

By measuring a number of software components that underpin trading systems, the proposed benchmark should provide a more real-life insight into the performance of trading infrastructure, compared to other benchmarks, which focus on just market data handling. As such, they might be considered more useful to those developing trading systems.

Separately, Redline’s move away from hardware acceleration technology to mainstream microprocessors is likely to fuel the continuing debate over the respective merits of the competing architectural approaches, especially as trading firms are increasingly leveraging FPGA chips for their proprietary systems.

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