Concluding our coverage of last month’s Low-Latency Summit in New York City, the compute panel allowed Mantara chief architect David Arnold to discuss how the trading application vendor leverages technologies to reduce latency. Mantara provides a platform for market data delivery, order routing and pre-trade risk, with customers requiring performance across the latency spectrum. As such, the company keeps a strong focus on underlying technologies, and looks to leverage them as much as possible.
Arnold noted that the company has divided its technology approach into two streams, based on the latency needs of its customers. For those requiring less than 100 microseconds, it has a software platform running on commodity x86 hardware. For below 10 microseconds, it has a hardware/firmware offering.
For its software platform, Mantara focuses on the application architecture, paying attention to such details as binding threads to cores, keeping inter-thread communication to cores on the same chip, and making use of kernel bypass to deliver network traffic direct to the application. Using these techniques, latencies as low as 10 to 20 microseconds can be achieved.
For the sub-10 microsecond world, where improvements in the 100s of nanoseconds are sought, Mantara relies on a hardware PCIe card, hosting a packet processor, which executes functions in firmware.
Packet processors are general purpose CPUs that have been optimised to perform I/O functions, such as memory management, packet steering, and network interfaces. Mantara uses packet processors from GE Intelligent Platforms, and also leverages network stack technology from 6Wind.
Arnold noted that a packet processor direction provides good performance at the right price point, and that they approach FPGAs in terms of performance, but offer more flexibility, because they can be programmed using traditional techniques.
Mantara writes its code in C, rather than C++, in order to keep more control over the execution of it – there are “no surprises” with C, Arnold said.
