So, those party animals at Activ Financial have invited me to a little gathering tonight – at the Nasdaq MarketSite in Times Square – to formally launch ActivFeed MPU, their new hardware-accelerated feed handling software. It should be an great event, and I’m looking forward to finding out more about the black art of programming FPGAs (that’s Field Programmable Gate Arrays) – an emerging technology that could have a huge impact on low latency systems.
Activ is one of only a couple of market data players that I am aware of that are leveraging FPGAs. Down in St. Louis, Exegy is also in the game, with its ticker plant, but the approach the two companies are taking is pretty different. Whereas Exegy has built an appliance – a hardware and software black box that uses FPGAs to maximise performance – Activ has re-written its existing feed handling software to exploit the HyperTransport technology used by AMD as part of its Torrenza coprocessor initiative.
With Activ’s solution, some software functions are executed on the main CPU, and some are run on the FPGA coprocessor, which comes from San Jose-based Altera. Since HyperTransport is being backed by a consortium that includes Apple, Sun Microsystems and Cisco Systems, Activ hopes its approach will find more acceptability than a proprietary approach.
We’ll see. Geek that I am, I remain a tad cautious in my expectations for real-life FPGA deployment on Wall Street. My take is it’s gonna take a while for the FUD level – we are talking about relying on a new technology that’s understood by few – to be overcome. Until it does, I suspect the more traditional multi-core, multi-threading technology direction will remain the focus of low latency development.
Perhaps one area where we will see early take up of FPGAs is in latency monitoring offerings like TipOff from TS-Associates. Investing in monitoring software being perceived as way less mission critical than rolling out new ticker plants. It will also be interesting to see what happens as Intel rolls out its own QuickAssist coprocessor technology.